1. Field of the Invention
The present invention relates to folding circuits, and more particularly to folding circuits having a resistive ladder.
2. Description of Related Art
A folding circuit provides an output waveform which ideally is a piecewise-linear periodic function of its input signal. This "folded" waveform can have a substantially smaller dynamic range than the input signal. As a consequence, a folding circuit can be very useful in an analog-to-digital converter (ADC) because the folded waveform can be digitized utilizing substantially fewer comparators than those which are typically required in a conventional parallel or "flash" analog-to-digital converter.
A parallel converter compares the analog input signal to a series of equally spaced reference voltages or thresholds. Typically, the reference voltages are produced by a Voltage source applied to a voltage divider circuit such as a resistive ladder to provide the multiple reference voltage levels. The comparison of the analog input signal to the reference voltages is usually performed by a bank of comparators. A typical n-bit flash converter requires 2.sup.n -1 comparators. Thus, for example, a flash converter having 8 bits of resolution can require as many as 255 comparators. In contrast, the number of comparators required by a converter using a folding circuit can be substantially reduced because of the smaller dynamic range at the output of the folding circuit as noted above.
FIG. 2 shows an example of a typical folding circuit. As shown therein, the folding circuit includes a plurality of differential transistor pairs, in which one input of each transistor pair is tied to a particular node of a resistive ladder which provides a series of successively increasing reference voltages. The other input of each differential pair is coupled to the input signal. As explained in greater detail below, the outputs of the differential pairs are suitably coupled to generate a periodic output, typically a sinusoid. One disadvantage of such an arrangement is that the load resistors of each differential pair must typically match each other in order to provide an accurate sinusoidal output. In addition, because each differential transistor pair is coupled to the input of the circuit, the differential transistor pairs capacitively load the input, which can substantially slow the operation of the converter.
Another problem associated with folding circuits, particularly those circuits which utilize bipolar transistor differential pairs, is that the transistors coupled to the resistive ladder draw a base current which flows through the resistive reference ladder. As a consequence, the reference voltages can be perturbed by the base currents which in turn distorts the sinusoidal output of the circuit. As a result, inaccuracies in the conversion of the input signal can occur.